Most C libraries have a pair of library routines for initializing, and then generating random numbers. Random number generator is required extensively by many applications like cryptography, simulation, numerical analysis, text-to-speech etc. This paper discusses in detail the hardware implementation of several RNGs and their characteristics. FPGAs make it possible to implement complex systems, such as numerical calculations, genetic programs, simulation algorithms etc., at hardware level. Although a majority of random number generators have been implemented in software level, increasing demand exists for hardware implementation due to the advent of faster and high density Field Programmable Gate Arrays (FPGA). True random number generators are slow and expensive for many applications while pseudo random number generators (RNG) suffice for most applications. Random numbers are used in a wide variety of applications. Also the simulation problem for long bit LFSR on FPGA is presented. The comparative study of 8, 16 and 32 bit LFSR on FPGA is shown here to understand the on chip verification. The analysis is conceded out to find number of gates, memory and speed requirement in FPGA as the number of bits is increased. Here in this paper we implemented 8, 16 and 32-bit LFSR on FPGA by using VHDL to study the performance and analysis the behavior of randomness. As it is simple counter so it can count maximum of 2n-1 by using maximum feedback polynomial. The total number of random state generated on LFSR depends on the feedback polynomial. As FPGAs is used to implement any logical function for faster prototype development, it is necessary to implement the existing design of LFSR on FPGA to test and verify the simulated & synthesis result between different lengths. It is more important to test and verify by implementing on any hardware for getting better efficient result. LFSR based PN Sequence Generator technique is used for various cryptography applications and for designing encoder, decoder in different communication channel.

Linear feedback shift register vhdl